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Thursday, October 24, 2024
Executive Briefing Center 8
Thursday, October 24, 2024
Executive Briefing Center 150
DOE plays an important role in AMAT End-End continuous process, design improvement and optimization. Unfortunately, most DOE practitioners may randomly pick any DOE design with JMP that they are familiar with while lacking a DOE statistics foundation, resulting in poor predictive models. As one of the most powerful Resolution IV algorithms, DSD allows us to study both main and interaction effects of a large number of predictors in a relatively small DOE run size. However, DSD cannot tolerate any Orthogonality Violations such as GRR Noise, SPC Time Noise, Design Constraint or Recursive Stepwise Algorithm. We studied a special case regarding DSD Blocking Design. Instead of assigning the two operation systems as Predictor factor, Blocking factor has been assigned. The DOE experimental operators did not pay full attention and changed the run order, not following the Blocking plan.  After completing the first half of nine runs (1st Blocking), the design process owner found Blocking mistakes and stopped the DOE runs immediately, which induced poor design evaluation.  After discussion, we found five alternative resolutions to improve the Orthogonal design structure. We conducted detailed Design Diagnostics on each alternative DOE proposal considering the DOE schedule and cost constraints. Among the five proposals, Augment DOE, adding nine new Augment points (all at corners) is the best to recover the most Orthogonal risks at the highest Return of Investment Ratio.  Through this DOE Blocking case study, we have further upgraded our JMP DOE knowledge with effective communication through this crisis.
Thursday, October 24, 2024
Executive Briefing Center 150
The semiconductor manufacturing industry stands on the brink of a transformative era, powered by advanced analytical techniques. This presentation delves into the application of predictive modeling and diagnostic analysis within JMP software to significantly enhance manufacturing outcomes, particularly during the crucial early sort and class test phases. By leveraging comprehensive parametric data collected across various stages of the semiconductor production process, we embark on a journey to refine the prediction of unit-level pass/fail outcomes and unearth the underlying causes of potential defects. Our study highlights the strategic use of JMP’s predictive modeling capabilities to accurately forecast the final system-level test status of semiconductor products. This approach not only allows for early detection of issues but also facilitates the implementation of corrective measures in a timely manner, thus ensuring higher yield rates and superior product quality. In parallel, diagnostic analysis within JMP offers a deep dive into the data, enabling manufacturers to identify and address root causes of failures across the intricate web of production processes. This presentation showcases real-world applications of these JMP features, demonstrating their pivotal role in streamlining semiconductor manufacturing workflows. See how predictive modeling and diagnostic analysis can be effectively employed to optimize production outcomes, reduce costs, and enhance product reliability. Join us in exploring the cutting-edge analytical strategies that promise to redefine the future of semiconductor manufacturing.