JSL Automation Helps Analyze the Results of Leading-Edge Semiconductor Design: M...
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JSL Automation Helps Analyze the Results of Leading-Edge Semiconductor Design: Making Complex JMP(R) Features Available to the Novice End User ( 2019-EU-30MP-076 )
Feb 20, 2019 7:34 PM
| Last Modified: Mar 18, 2019 9:26 AM
Level: Beginner Job Function: Analyst / Scientist / Engineer Oisín Casey, Structural Design Engineer, Intel Courtney Conroy, Student, University of Limerick
This paper will explore how JMP can be used to enhance and simplify the analysis of semiconductor layout design data and demonstrate its importance for structural design teams within Intel. In structural design, large amounts of information is reported and used to analyze various data points, such as timing violations and logic levels between flip flops. Previously, due to file size, we were limited with the analysis we could perform. In this paper, we will show how JMP has transformed how we interpret this data. Due to the nature of our data, graphs were generated based on the inclusion or exclusion of certain criteria using the Select Where function. Using JSL, we automated the generation of this data, which included the compilation of various data visualizations output to a single PDF. Our script enables the individual engineer to use JMP to generate the reports for his own design. The goal of this talk is to give an overview of how JMP can be incorporated into the day-to-day lives of engineers. In an industry that has yet to fully explore the benefits and features of JMP, we demonstrate how it can be used with several real-life industry examples.