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Level IV

Metrology Site Reduction Analysis of All Combinations Using NChooseK Matrix JSL Function

 Metrology on semiconductor wafers is necessary to understand process targeting and sources of variation. For new device introduction and initial volume production, wafer metrology may use a large number of sites for establishing targets, setting up APC (Automated Process Control), and determine sources of variation across the wafer. However, ongoing metrology on production is often viewed as non-value added. As manufacturing volume increases and the process is maturing, the question arises: what is the purpose of the continuing metrology in relation to the number of sites? Can the number of sites be reduced to increase throughput at metrology? In the past, sites may have been removed based on current maps with reduced sites on other production, and the impact of the new map analyzed with the current site data. Utilizing the built in JSL function NChooseKMatrix(n,k) which generates all possible combinations for Choose K sites from N sites, and the Prediction Profiler, JMP scripts were created that could quickly analyze and weigh all combinations of varying K, and allow the user to pick the best reduced site map based on various requirements. Examples for different scenarios will be shown.