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High-Speed Hardware Interface Development With Design of Experiments

Richard Allred, Senior Staff Engineer SiSoft orthogonal
Barry Katz, President and CTO, Si Soft

The explosive growth of internet usage brings with it a huge demand in bandwidth capabilities.  This has forced the computer communication industry to continually push the limits to improve line speed, density and power consumption of communication links.

The design of these links is a highly complex task, where multiple objectives such as cost, performance and power must be weighed to create a competitive product.  This poster describes and demonstrates how the Design of Experiments and Response Surface Modeling techniques were used to
answer design problems, to quantify manufacturing variation and estimate Yield performance.  This effort resulted in the industry’s first 100 Gigabit Ethernet CMOS PHY chipset.

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