Define-Measure-Analyze-Improve-Control is a Six Sigma methodology that is used to move methodically through the five stages for finding a solution for processing issues in semiconductor chip back-end assembly. Through each stage, data is collected and JMP is used to describe the data and provide inferences toward the effectiveness of actions and factors to move the yield trends toward a target. 

The Define stage, with key contributions in the Project Charter, is aided by JMP Graph Builder to produce time series plots and bar charts that explain the need for moving toward a SMART objective. 

In JMP, Pareto charting, linearity and bias, Gauge R&R, and process capability analysis are the main tools used in the Measure stage. Suitable sampling sizes are selected to match the confidence levels of the expected results. 

Hypothesis testing, both in proportions and means for parametric and non-parametric distributions, are the primary tools used in Analyze stage. Equality of variance helps to understand the robustness of a process. 

JMP DOE is the main tool used in the Improve stage, with time series plots used for monitoring the first short-term pilot batches. 

Finally, JMP control charts are utilised to monitor the trends after launching the process improvements.